The prior art includes many processes and technologies related to the fabrication of semiconductor wafers. The fabrication of integrated circuits on a semiconductor wafer involves the formation of layers of material on a semiconductor substrate, where such layers typically include dielectric (insulating) layers and metal (conductive) layers. Features on a given layer of material are usually created by way of photolithography: the layer of material is coated with photoresist; the photoresist is exposed with radiation through a pattern or a mask that defines the desired features; and the photoresist is developed to enable selective removal of the exposed (or unexposed) photoresist. After developing, the remaining photoresist material represents a pattern that can be used for a subsequent processing step such as etching. In practice, a wafer may have many layers of materials that are treated in this manner, resulting in a “stack” of dielectric and conductive metal layers.
Photoresist material is usually applied to the surface of the wafer in liquid form as the wafer is spinning (spin coating). The centrifugal force resulting from the spinning causes the photoresist to spread across the surface of the wafer. A small amount of the photoresist flows around the perimeter edge of the wafer, resulting in non-uniform photoresist thickness near the edge. Edge exposure procedures can be utilized to remove photoresist and/or material located at or near the edge of the wafer. Such edge exposure procedures typically expose only the edge of the wafer in a separate step, i.e., the remaining area of the photoresist layer is exposed to create the desired pattern in a different step.
Conventional edge exposure processes do not provide precise control of the resulting film profile at the edge of the wafer. A discontinuous edge profile may be formed, and such discontinuities can cause peeling or flaking of the material layers. Edge peeling can result in the migration of contaminates into the patterned section of the wafer, which impacts manufacturing yields. This problem is exacerbated when many layers of material are formed on the substrate.